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Citation indices
 AllSince 2009
Citations102101
h-index66
i10-index33
Citations to my articles
Citations to my articles
1-17
Title / AuthorCited by Year
Experimental validation of the learning effect for a pedagogical game on computer fundamentals
G Sindre, L Natvig, M Jahre
Education, IEEE Transactions on 52 (1), 10-18
372009
A light-weight fairness mechanism for chip multiprocessor memory systems
M Jahre, L Natvig
Proceedings of the 6th ACM conference on Computing frontiers, 1-10
142009
Storage efficient hardware prefetching using delta-correlating prediction tables
M Grannaes, M Jahre, L Natvig
J Instr Level Parallelism 13
132011
Low-cost open-page prefetch scheduling in chip multiprocessors
M Grannæs, M Jahre, L Natvig
Computer Design, 2008. ICCD 2008. IEEE International Conference on, 390-396
82008
Performance effects of a cache miss handling architecture in a multi-core processor
M Jahre, L Natvig
82007
A quantitative study of memory system interference in chip multiprocessor architectures
M Jahre, M Grannaes, L Natvig
High Performance Computing and Communications, 2009. HPCC'09. 11th IEEE ...
72009
A high performance adaptive miss handling architecture for chip multiprocessors
M Jahre, L Natvig
Transactions on High-Performance Embedded Architectures and Compilers IV, 1-20
52011
Multi-level hardware prefetching using low complexity delta correlating prediction tables with partial matching
M Grannaes, M Jahre, L Natvig
High Performance Embedded Architectures and Compilers, 247-261
32010
DIEF: an accurate interference feedback mechanism for chip multiprocessor memory systems
M Jahre, M Grannaes, L Natvig
High Performance Embedded Architectures and Compilers, 292-306
22010
Improving the Performance of Parallel Applications in Chip Multiprocessors with Architectural Techniques
M Jahre
Norwegian University of Science and Technology
22007
On the Energy Footprint of Task Based Parallel Applications
AC Iordan, M Jahre, L Natvig
International Conference on High Performance Computing and Simulation (HPCS)
12013
Towards Efficient Simulation of Task Based Parallel Applications
AC Iordan, M Jahre, L Natvig
Norsk informatikkonferanse 2012
12012
Managing Shared Resources in Chip Multiprocessor Memory Systems
M Jahre
NTNU
12010
Optimized Hardware for Suboptimal Software: The Case for SIMD-aware Benchmarks
JM Cebrián, M Jahre, L Natvig
International Symposium on Performance Analysis of Systems and Software (ISPASS)
2014
Victim Selection Policies for Intel TBB: Overheads and Energy Footprint
AC Iordan, M Jahre, L Natvig
Architecture of Computing Systems–ARCS 2014, 13-24
2014
Challenges of Reducing Cycle-Accurate Simulation Time for TBP Applications
AC Iordan, M Jahre, L Natvig
Procedia Computer Science 18, 1814-1823
2013
Exploring the prefetcher/memory controller design space: an opportunistic prefetch scheduling strategy
M Grannaes, M Jahre, L Natvig
Architecture of Computing Systems-ARCS 2011, 135-146
2011
1-17
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