| Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems C Ferri, S Wood, T Moreshet, RI Bahar, M Herlihy Journal of Parallel and Distributed Computing 70 (10), 1042-1052, 2010 | 57 | 2010 |
| Energy reduction in multiprocessor systems using transactional memory T Moreshet, RI Bahar, M Herlihy Proceedings of the 2005 international symposium on Low power electronics and …, 2005 | 53 | 2005 |
| Energy-aware microprocessor synchronization: Transactional memory vs. locks T Moreshet, RI Bahar, M Herlihy Fourth Annual Boston-Area Architecture Workshop, 21, 2006 | 51 | 2006 |
| Energy efficient synchronization techniques for embedded architectures C Ferri, A Viescas, T Moreshet, RI Bahar, M Herlihy Proceedings of the 18th ACM Great Lakes symposium on VLSI, 435-440, 2008 | 34 | 2008 |
| SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs C Ferri, A Marongiu, B Lipton, RI Bahar, T Moreshet, L Benini, M Herlihy Proceedings of the seventh IEEE/ACM/IFIP international conference on …, 2011 | 30 | 2011 |
| A hardware/software framework for supporting transactional memory in a MPSoC environment C Ferri, T Moreshet, RI Bahar, L Benini, M Herlihy ACM SIGARCH Computer Architecture News 35 (1), 47-54, 2007 | 27 | 2007 |
| Concurrent data structures with near-data-processing: An architecture-aware implementation J Choe, A Huang, T Moreshet, M Herlihy, RI Bahar The 31st ACM Symposium on Parallelism in Algorithms and Architectures, 297-308, 2019 | 22 | 2019 |
| Energy implications of transactional memory for embedded architectures C Ferri, A Viescas, T Moreshet, I Bahar, M Herlihy Wkshp. on Exploiting Parallelism with Transactional Memory and Other …, 2008 | 20 | 2008 |
| Energy and throughput efficient transactional memory for embedded multicore systems C Ferri, S Wood, T Moreshet, I Bahar, M Herlihy High Performance Embedded Architectures and Compilers: 5th International …, 2010 | 16 | 2010 |
| Power-aware issue queue design for speculative instructions T Moreshet, RI Bahar Proceedings of the 40th Annual Design Automation Conference, 634-637, 2003 | 13 | 2003 |
| Power-performance comparison of single-task driven many-cores F Keceli, T Moreshet, U Vishkin 2011 IEEE 17th International Conference on Parallel and Distributed Systems …, 2011 | 11 | 2011 |
| Complexity-effective issue queue design under load-hit speculation T Moreshet, RI Bahar Proc. Workshop Complexity-Effective Design, 2002 | 10 | 2002 |
| Attacking memory-hard scrypt with near-data-processing J Choe, T Moreshet, RI Bahar, M Herlihy Proceedings of the International Symposium on Memory Systems, 33-37, 2019 | 9 | 2019 |
| Playing with fire: Transactional memory revisited for error-resilient and energy-efficient mpsoc execution D Papagiannopoulou, A Marongiu, T Moreshet, L Benini, M Herlihy, ... Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 9-14, 2015 | 9 | 2015 |
| Speculative synchronization for coherence-free embedded NUMA architectures D Papagiannopoulou, T Moreshet, A Marongiu, L Benini, M Herlihy, ... 2014 International Conference on Embedded Computer Systems: Architectures …, 2014 | 9 | 2014 |
| Hybrids: Cache-conscious concurrent data structures for near-memory processing architectures J Choe, A Crotty, T Moreshet, M Herlihy, RI Bahar Proceedings of the 34th ACM Symposium on Parallelism in Algorithms and …, 2022 | 7 | 2022 |
| Edge-TM: Exploiting transactional memory for error tolerance and energy efficiency D Papagiannopoulou, A Marongiu, T Moreshet, M Herlihy, RI Bahar ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-18, 2017 | 7 | 2017 |
| Effects of speculation on performance and issue queue design T Moreshet, RI Bahar IEEE transactions on very large scale integration (VLSI) systems 12 (10 …, 2004 | 6 | 2004 |
| Evaluating critical bits in arithmetic operations due to timing violations S Whang, T Rachford, D Papagiannopoulou, T Moreshet, RI Bahar 2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2017 | 5 | 2017 |
| Energy-efficient and high-performance lock speculation hardware for embedded multicore systems D Papagiannopoulou, G Capodanno, T Moreshet, M Herlihy, RI Bahar ACM Transactions on Embedded Computing Systems (TECS) 14 (3), 1-27, 2015 | 5 | 2015 |
