Jim Torresen
Jim Torresen
Verified email at ifi.uio.no
TitleCited byYear
A divide-and-conquer approach to evolvable hardware
J Torresen
International Conference on Evolvable Systems, 57-65, 1998
1561998
FPGASort: A high performance sorting architecture exploiting run-time reconfiguration on FPGAs for large problem sorting
D Koch, J Torresen
Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011
1442011
Efficient recognition of speed limit signs
J Torresen, JW Bakke, L Sekanina
Proceedings. The 7th International IEEE Conference on Intelligent …, 2004
1292004
Go ahead: A partial reconfiguration framework
C Beckhoff, D Koch, J Torresen
2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012
1112012
The xilinx design language (xdl): Tutorial and use cases
C Beckhoff, D Koch, J Torresen
6th International Workshop on Reconfigurable Communication-Centric Systems …, 2011
842011
A survey of self-awareness and its application in computing systems
PR Lewis, A Chandra, S Parsons, E Robinson, K Glette, R Bahsoon, ...
2011 Fifth IEEE Conference on Self-Adaptive and Self-Organizing Systems …, 2011
812011
A scalable approach to evolvable hardware
J Torresen
Genetic programming and evolvable machines 3 (3), 259-282, 2002
732002
High speed partial run-time reconfiguration using enhanced ICAP hard macro
SG Hansen, D Koch, J Torresen
2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011
722011
Evolving multiplier circuits by training set and training vector partitioning
J Torresen
International Conference on Evolvable Systems, 228-237, 2003
582003
An evolvable hardware tutorial
J Torresen
International Conference on Field Programmable Logic and Applications, 821-830, 2004
572004
A flexible on-chip evolution system implemented on a Xilinx Virtex-II Pro device
K Glette, J Torresen
International Conference on Evolvable Systems, 66-75, 2005
562005
Possibilities and limitations of applying evolvable hardware to real-world applications
J Torresen
International Workshop on Field Programmable Logic and Applications, 230-239, 2000
512000
Detection of Norwegian Speed Limit Signs.
L Sekanina, J Tørresen
ESM, 337-340, 2002
452002
Scalable evolvable hardware applied to road image recognition
J Torresen
Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware, 245-252, 2000
452000
Implementing evolution of FIR-filters efficiently in an FPGA
KA Vinger, J Torresen
NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings., 26-29, 2003
442003
On-chip evolution using a soft processor core applied to image recognition
K Glette, J Torresen, M Yasunaga, Y Yamaguchi
First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06), 373-380, 2006
422006
Increased complexity evolution applied to evolvable hardware
J Torresen
Smart Engineering System Design: Neural Networks, Fuzzy Logic, Evolutionary …, 1999
401999
Architectural aspects of self-aware and self-expressive computing systems: From psychology to engineering
PR Lewis, A Chandra, F Faniyi, K Glette, T Chen, R Bahsoon, J Torresen, ...
Computer 48 (8), 62-70, 2015
372015
Exploiting reconfigurable hardware for network security
S Li, J Torresen, O Soraasen
11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2003
372003
Intermediate level FPGA reconfiguration for an online EHW pattern recognition system
K Glette, J Torresen, M Hovin
2009 NASA/ESA Conference on Adaptive Hardware and Systems, 19-26, 2009
362009
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