Finn: A framework for fast, scalable binarized neural network inference Y Umuroglu, NJ Fraser, G Gambardella, M Blott, P Leong, M Jahre, ... Proceedings of the 2017 ACM/SIGDA international symposium on field …, 2017 | 1322 | 2017 |
EPIC: An energy-efficient, high-performance GPGPU computing research infrastructure M Själander, M Jahre, G Tufte, N Reissmann arXiv preprint arXiv:1912.05848, 2019 | 207 | 2019 |
Experimental validation of the learning effect for a pedagogical game on computer fundamentals G Sindre, L Natvig, M Jahre IEEE Transactions on Education 52 (1), 10-18, 2008 | 99 | 2008 |
Scaling binarized neural networks on reconfigurable logic NJ Fraser, Y Umuroglu, G Gambardella, M Blott, P Leong, M Jahre, ... Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and …, 2017 | 78 | 2017 |
Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platform Y Umuroglu, D Morrison, M Jahre 2015 25th International Conference on Field Programmable Logic and …, 2015 | 71 | 2015 |
Streamlined deployment for quantized neural networks Y Umuroglu, M Jahre arXiv preprint arXiv:1709.04060, 2017 | 51 | 2017 |
The READEX formalism for automatic tuning for energy efficiency J Schuchart, M Gerndt, PG Kjeldsberg, M Lysaght, D Horák, L Říha, ... Computing 99, 727-745, 2017 | 44 | 2017 |
Hsm: A hybrid slowdown model for multitasking gpus X Zhao, M Jahre, L Eeckhout Proceedings of the twenty-fifth international conference on architectural …, 2020 | 40 | 2020 |
Get Out of the Valley: Power-Efficient Address Mapping for GPUs Y Liu, X Zhao, M Jahre, Z Wang, X Wang, Y Luo, L Eeckhout International Symposium on Computer Architecture (ISCA), 2018 | 37 | 2018 |
An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators Y Umuroglu, M Jahre The 32nd IEEE International Conference on Computer Design (ICCD), 2014 | 37 | 2014 |
ParVec: vectorizing the PARSEC benchmark suite JM Cebrian, M Jahre, L Natvig Computing 97 (11), 1077-1100, 2015 | 33 | 2015 |
Scalability analysis of AVX-512 extensions JM Cebrian, L Natvig, M Jahre The Journal of supercomputing 76 (3), 2082-2097, 2020 | 31 | 2020 |
Optimized Hardware for Suboptimal Software: The Case for SIMD-aware Benchmarks JM Cebrián, M Jahre, L Natvig International Symposium on Performance Analysis of Systems and Software (ISPASS), 2014 | 29 | 2014 |
Storage efficient hardware prefetching using delta-correlating prediction tables M Grannaes, M Jahre, L Natvig Journal of Instruction-Level Parallelism 13, 1-16, 2011 | 28 | 2011 |
TULIPP: Towards ubiquitous low-power image processing platforms T Kalb, L Kalms, D Göhringer, C Pons, F Marty, A Muddukrishna, M Jahre, ... 2016 International Conference on Embedded Computer Systems: Architectures …, 2016 | 27 | 2016 |
Supporting utilities for heterogeneous embedded image processing platforms (STHEM): An overview A Sadek, A Muddukrishna, L Kalms, A Djupdal, A Podlubne, A Paolillo, ... Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2018 | 26 | 2018 |
MDM: The GPU memory divergence model L Wang, M Jahre, A Adileho, L Eeckhout 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 25 | 2020 |
A light-weight fairness mechanism for chip multiprocessor memory systems M Jahre, L Natvig Proceedings of the 6th ACM conference on Computing frontiers, 1-10, 2009 | 24 | 2009 |
DCMI: A scalable strategy for accelerating iterative stencil loops on FPGAs M Koraei, O Fatemi, M Jahre ACM Transactions on Architecture and Code Optimization (TACO) 16 (4), 1-24, 2019 | 20 | 2019 |
GDP: Using Dataflow Properties to Accurately Estimate Interference-Free Performance at Runtime M Jahre, L Eeckhout International Symposium on High Performance Computer Architecture (HPCA), 2018 | 19 | 2018 |