| Fast multiplier generator for FPGAs with LUT based partial product generation and column/row compression A Kakacak, AE Guzel, O Cihangir, S Gören, HF Ugurdag Integration 57, 147-157, 2017 | 23 | 2017 |
| Using high-level synthesis for rapid design of video processing pipes AE Guzel, VE Levent, M Tosun, MA Özkan, T Akgun, D Büyükaydin, ... 2016 IEEE East-West Design & Test Symposium (EWDTS), 1-4, 2016 | 14 | 2016 |
| Poselab: A levenberg-marquardt based prototyping environment for camera pose estimation M Darcis, W Swinkels, AE Güzel, L Claesen 2018 11th International Congress on Image and Signal Processing, BioMedical …, 2018 | 7 | 2018 |
| Rapid design of real-time image fusion on FPGA using HLS and other techniques F Aydin, HF Ugurdag, VE Levent, AE Guzel, NFR Annafianto, MA Ozkan, ... 2018 IEEE/ACS 15th International Conference on Computer Systems and …, 2018 | 5 | 2018 |
| Tools and techniques for implementation of real-time video processing algorithms VE Levent, AE Guzel, M Tosun, M Buyukmihci, F Aydin, S Gören, C Erbas, ... Journal of Signal Processing Systems 91, 93-113, 2019 | 2 | 2019 |
| Output domain downscaler M Büyükmıhçı, VE Levent, AE Guzel, O Ates, M Tosun, T Akgün, C Erbas, ... Computer and Information Sciences: 31st International Symposium, ISCIS 2016 …, 2016 | 2 | 2016 |
| Fast incremental least square pose estimation for hardware implementation with rolling shutter camera AE Güzel, D Hisar, L Claesen, HF Uğurdağ 2020 28th Signal Processing and Communications Applications Conference (SIU …, 2020 | 1 | 2020 |
| Fast one-and two-pick fixed-priority selection and muxing circuits M Tosun, MA Özkan, AE Güzel, HF Ugurdag 2016 IEEE East-West Design & Test Symposium (EWDTS), 1-4, 2016 | 1 | 2016 |
| High level synthesis for rapid design of video processing pipes AE Güzel Fen Bilimleri Enstitüsü, 2017 | | 2017 |
