Emil Matus
Emil Matus
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Euroserver: Energy efficient node for european micro-servers
Y Durand, PM Carpenter, S Adami, A Bilas, D Dutoit, A Farcy, ...
2014 17th Euromicro Conference on Digital System Design, 206-213, 2014
Synchronous transfer architecture (STA)
G Cichon, P Robelly, H Seidel, E Matúš, M Bronzel, G Fettweis
Computer Systems: Architectures, Modeling, and Simulation: Third and Fourth …, 2004
A low-power scalable signal processing chip platform for 5G and beyond-kachel
G Fettweis, M Hassler, R Wittig, E Matus, S Damjancevic, S Haas, F Pauls, ...
2019 53rd Asilomar Conference on Signals, Systems, and Computers, 896-900, 2019
A 105 GOPS 36mm2 heterogeneous SDR MPSOC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS
B Noethen, O Arnold, EP Adeva, T Seifert, E Fischer, S Kunze, E Matus, ...
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 …, 2014
Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs
O Arnold, E Matus, B Noethen, M Winter, T Limberg, G Fettweis
ACM Transactions on Embedded Computing Systems (TECS) 13 (3s), 1-24, 2014
A heterogeneous MPSoC with hardware supported dynamic task scheduling for software defined radio
T Limberg, M Winter, M Bimberg, R Klemm, M Tavares, H Ahlendorf, ...
Design Automation Conference 2009, 97-98, 2009
A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals
T Limberg, M Winter, M Bimberg, R Klemm, E Matus, MBS Tavares, ...
ESSCIRC 2008-34th European Solid-State Circuits Conference, 466-469, 2008
A heterogeneous SDR MPSoC in 28 nm CMOS for low-latency wireless applications
S Haas, T Seifert, B Nöthen, S Scholze, S Höppner, A Dixius, EP Adeva, ...
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
A 335Mb/s 3.9mm265nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates
M Winter, S Kunze, EP Adeva, B Mennenga, E Matûs, G Fettweis, ...
2012 IEEE International Solid-State Circuits Conference, 216-218, 2012
EUROSERVER: Share-anything scale-out micro-server design
M Marazakis, J Goodacre, D Fuin, P Carpenter, J Thomson, E Matus, ...
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 678-683, 2016
Towards a GBit/s programmable decoder for LDPC convolutional codes
E Matus, MBS Tavares, M Bimberg, GP Fettweis
2007 IEEE International Symposium on Circuits and Systems, 1657-1660, 2007
A high-throughput programmable decoder for LDPC convolutional codes
M Bimberg, MBS Tavares, E Matus, GP Fettweis
2007 IEEE International Conf. on Application-specific Systems, Architectures …, 2007
An MPSoC for energy-efficient database query processing
S Haas, O Arnold, B Nöthen, S Scholze, G Ellguth, A Dixius, S Höppner, ...
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
Code generation for STA architecture
J Guo, T Limberg, E Matús, B Mennenga, R Klemm, G Fettweis
Euro-Par 2006 Parallel Processing, 299-310, 2006
Vectorization of the sphere detection algorithm
B Mennenga, E Matus, G Fettweis
2009 IEEE International Symposium on Circuits and Systems (ISCAS), 2806-2809, 2009
A GFLOPS vector-DSP for broadband wireless applications
E Matus, H Seidel, T Limberg, P Robelly, G Fettweis
IEEE Custom Integrated Circuits Conference (CICC'06), 543-546, 2006
Channel estimation for advanced 5G/6G use cases on a vector digital signal processor
SA Damjancevic, E Matus, D Utyansky, P van der Wolf, GP Fettweis
IEEE Open Journal of Circuits and Systems 2, 265-277, 2021
A dual-core programmable decoder for LDPC convolutional codes
MBS Tavares, E Matus, S Kunze, GP Fettweis
2008 IEEE International Symposium on Circuits and Systems (ISCAS), 532-535, 2008
ASIP decoder architecture for convolutional and LDPC codes
S Kunze, E Matus, GP Fettweis
2009 IEEE International Symposium on Circuits and Systems (ISCAS), 2457-2460, 2009
High performance dynamic resource allocation for guaranteed service in network-on-chips
Y Chen, E Matus, S Moriam, GP Fettweis
IEEE Transactions on Emerging Topics in Computing 8 (2), 503-516, 2017
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