| ALIGN: Open-source analog layout automation from the ground up K Kunal, M Madhusudan, AK Sharma, W Xu, SM Burns, R Harjani, J Hu, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019 | 83 | 2019 |
| GANA: Graph convolutional network based automated netlist annotation for analog circuits K Kunal, T Dhar, M Madhusudan, J Poojary, A Sharma, W Xu, SM Burns, ... 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 55-60, 2020 | 70 | 2020 |
| ALIGN: A system for automating analog layout T Dhar, K Kunal, Y Li, M Madhusudan, J Poojary, AK Sharma, W Xu, ... IEEE Design & Test 38 (2), 8-18, 2020 | 46 | 2020 |
| A general approach for identifying hierarchical symmetry constraints for analog circuit layout K Kunal, J Poojary, T Dhar, M Madhusudan, R Harjani, SS Sapatnekar Proceedings of the 39th International Conference on Computer-Aided Design, 1-8, 2020 | 44 | 2020 |
| Chipnemo: Domain-adapted llms for chip design M Liu, TD Ene, R Kirby, C Cheng, N Pinckney, R Liang, J Alben, H Anand, ... arXiv preprint arXiv:2311.00176, 2023 | 19 | 2023 |
| GNNIE: GNN inference engine with load-balancing and graph-specific caching S Mondal, SD Manasi, K Kunal, R S, SS Sapatnekar Proceedings of the 59th ACM/IEEE Design Automation Conference, 565-570, 2022 | 13 | 2022 |
| BeGAN: Power grid benchmark generation using a process-portable GAN-based methodology VA Chhabria, K Kunal, M Zabihi, SS Sapatnekar 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-8, 2021 | 9 | 2021 |
| Fast and efficient constraint evaluation of analog layout using machine learning models T Dhar, J Poojary, Y Li, K Kunal, M Madhusudan, AK Sharma, SD Manasi, ... Proceedings of the 26th Asia and South Pacific design automation conference …, 2021 | 7 | 2021 |
| The ALIGN open-source analog layout generator: V1. 0 and beyond T Dhar, K Kunal, Y Li, Y Lin, M Madhusudan, J Poojary, AK Sharma, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-2, 2020 | 6 | 2020 |
| GNN-based hierarchical annotation for analog circuits K Kunal, T Dhar, M Madhusudan, J Poojary, AK Sharma, W Xu, SM Burns, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 3 | 2023 |
| Machine Learning for Analog Layout SM Burns, H Chen, T Dhar, R Harjani, J Hu, N Karmokar, K Kunal, Y Li, ... Machine Learning Applications in Electronic Design Automation, 505-544, 2022 | 2 | 2022 |
| Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology M Madhusudan, J Poojary, AK Sharma, S Ramprasath, K Kunal, ... ESSDERC 2023-IEEE 53rd European Solid-State Device Research Conference …, 2023 | 1 | 2023 |
| A Unified Engine for Accelerating GNN Weighting/Aggregation Operations, with Efficient Load Balancing and Graph-Specific Caching S Mondal, SD Manasi, K Kunal, S Ramprasath, Z Zeng, SS Sapatnekar IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022 | 1 | 2022 |
| Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design … A Sharma, TD Ene, K Kunal, M Liu, Z Hasan, H Ren arXiv preprint arXiv:2404.08850, 2024 | | 2024 |
| Reinforcing the Connection between Analog Design and EDA K Kunal, M Madhusudan, J Poojary, S Ramprasath, AK Sharma, ... 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 665-670, 2024 | | 2024 |
| Automated synthesis of mixed-signal ML inference hardware under accuracy constraints K Kunal, J Poojary, S Ramprasath, R Harjani, SS Sapatnekar 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 478-483, 2024 | | 2024 |
| A Multicore GNN Training Accelerator S Mondal, S Ramprasath, Z Zeng, K Kunal, SS Sapatnekar 2023 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2023 | | 2023 |
| Analog Design Automation in the Era of Machine Learning K Kunal University of Minnesota, 2022 | | 2022 |
| Machine Learning Techniques in Analog Layout Automation T Dhar, K Kunal, Y Li, Y Lin, M Madhusudan, J Poojary, AK Sharma, ... Proceedings of the 2021 International Symposium on Physical Design, 71-72, 2021 | | 2021 |
| Learning from Experience: Applying ML to Analog Circuit Design K Kunal, T Dhar, Y Li, M Madhusudan, J Poojary, AK Sharma, W Xu, ... Proceedings of the 2020 International Symposium on Physical Design, 55-55, 2020 | | 2020 |
Sachin SapatnekarUniversity of MinnesotaVerified email at umn.edu
