Simone Secchi
Cited by
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An FPGA-based framework for technology-aware prototyping of multicore embedded architectures
P Meloni, S Secchi, L Raffo
IEEE Embedded Systems Letters 2 (1), 5-9, 2010
Experiences with string matching on the fermi architecture
A Tumeo, S Secchi, O Villa
Architecture of Computing Systems-ARCS 2011: 24th International Conference …, 2011
Designing next-generation massively multithreaded architectures for irregular applications
A Tumeo, S Secchi, O Villa
Computer 45 (8), 53-61, 2012
Efficient sorting on the tilera manycore architecture
A Morari, A Tumeo, O Villa, S Secchi, M Valero
2012 IEEE 24th International Symposium on Computer Architecture and High …, 2012
Enabling fast asip design space exploration: An fpga-based runtime reconfigurable prototyper
P Meloni, S Pomata, G Tuveri, S Secchi, L Raffo, M Lindwer
VLSI Design 2012, 2012
A surface tension and coalescence model for dynamic distributed resources allocation in massively parallel processors on-chip
F Palumbo, D Pani, L Raffo, S Secchi
Nature Inspired Cooperative Strategies for Optimization (NICSO 2007), 335-345, 2008
Fast and accurate simulation of the cray xmt multithreaded supercomputer
O Villa, A Tumeo, S Secchi, JB Manzano
IEEE Transactions on Parallel and Distributed Systems 23 (12), 2266-2279, 2012
A bandwidth-optimized multi-core architecture for irregular applications
S Secchi, A Tumeo, O Villa
2012 12th IEEE/ACM International Symposium on Cluster, Cloud and Grid …, 2012
A novel non-exclusive dual-mode architecture for mpsocs-oriented network on chip designs
F Palumbo, S Secchi, D Pani, L Raffo
Embedded Computer Systems: Architectures, Modeling, and Simulation: 8th …, 2008
Irregular applications: architectures & algorithms
J Feo, O Villa, A Tumeo, S Secchi
Proceedings of the 1st Workshop on Irregular Applications: Architectures and …, 2011
A network on chip architecture for heterogeneous traffic support with non-exclusive dual-mode switching
S Secchi, F Palumbo, D Pani, L Raffo
2008 11th EUROMICRO Conference on Digital System Design Architectures …, 2008
Exploring efficient hardware support for applications with irregular memory patterns on multinode manycore architectures
M Ceriani, S Secchi, O Villa, A Tumeo, G Palermo
IEEE Transactions on Parallel and Distributed Systems 28 (6), 1635-1648, 2014
A runtime adaptive H. 264 video-decoding MPSoC platform
G Tuveri, S Secchi, P Meloni, L Raffo, E Cannella
2013 Conference on Design and Architectures for Signal and Image Processing …, 2013
Exploring manycore multinode systems for irregular applications with FPGA prototyping
M Ceriani, G Palermo, S Secchi, A Tumeo, O Villa
2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013
Contention Modeling for Multithreaded Distributed Shared Memory Machines: The Cray XMT
S Secchi, A Tumeo, O Villa
2011 11th IEEE/ACM International Symposium on Cluster, Cloud and Grid …, 2011
Exploiting FPGAs for technology-aware system-level evaluation of multi-core architectures
S Secchi, P Meloni, L Raffo
2010 IEEE International Symposium on Performance Analysis of Systems …, 2010
Exploring hardware support for scaling irregular applications on multi-node multi-core architectures
S Secchi, M Ceriani, A Tumeo, O Villa, G Palermo, L Raffo
2013 IEEE 24th International Conference on Application-Specific Systems …, 2013
Self organization on a swarm computing fabric: A new way to look at fault tolerance
D Pani, S Secchi, L Raffo
Proceedings of the 7th ACM international conference on Computing frontiers …, 2010
Special Issue on Architectures and Algorithms for Irregular Applications (AAIA)-Guest editors' introduction
A Tumeo, J Feo, O Villa, S Secchi, TG Mattson
Journal of Parallel and Distributed Computing 76 (C), 1-2, 2015
Special Issue of Journal of Parallel and Distributed Computing
JT Feo, A Tumeo, TG Mattson, O Villa, S Secchi
Journal of Parallel and Distributed Computing 74 (1), 2027-2028, 2014
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