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Irshad Pananilath
Irshad Pananilath
Research Student, Indian Institute of Science, Bangalore
Verifisert e-postadresse på csa.iisc.ernet.in
Tittel
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Tiling stencil computations to maximize parallelism
V Bandishti, I Pananilath, U Bondhugula
SC'12: Proceedings of the International Conference on High Performance …, 2012
2432012
Diamond tiling: Tiling techniques to maximize parallelism for stencil computations
U Bondhugula, V Bandishti, I Pananilath
IEEE Transactions on Parallel and Distributed Systems 28 (5), 1285-1298, 2016
832016
An optimizing code generator for a class of lattice-boltzmann computations
I Pananilath, A Acharya, V Vasista, U Bondhugula
ACM Transactions on Architecture and Code Optimization (TACO) 12 (2), 1-23, 2015
252015
k-RTP: A Reliable Transport Layer Protocol for Wireless Sensor Networks
V Pathari, M Jose, GR Ragul, PM Irshad
Wireless Sensor Networks, 2006
2006
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Artikler 1–4