Andrea Marongiu
Sitert av
Sitert av
PULP: A parallel ultra low power platform for next generation IoT applications
D Rossi, F Conti, A Marongiu, A Pullini, I Loi, M Gautschi, G Tagliavini, ...
2015 IEEE Hot Chips 27 Symposium (HCS), 1-39, 2015
A transprecision floating-point platform for ultra-low power computing
G Tagliavini, S Mach, D Rossi, A Marongiu, L Benini
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
An OpenMP compiler for efficient use of distributed scratchpad memory in MPSoCs
A Marongiu, L Benini
IEEE Transactions on Computers 61 (2), 222-236, 2010
Timing characterization of OpenMP4 tasking model
MA Serrano, A Melani, R Vargas, A Marongiu, M Bertogna, E Quinones
2015 International Conference on Compilers, Architecture and Synthesis for …, 2015
A variability-aware openmp environment for efficient execution of accuracy-configurable computation on shared-fpu processor clusters
A Rahimi, A Marongiu, RK Gupta, L Benini
2013 International Conference on Hardware/Software Codesign and System …, 2013
OpenMP and timing predictability: A possible union?
R Vargas, E Quinones, A Marongiu
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 617-620, 2015
Virtualsoc: A full-system simulation environment for massively parallel heterogeneous system-on-chip
D Bortolotti, C Pinto, A Marongiu, M Ruggiero, L Benini
2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013
GPUguard: Towards supporting a predictable execution model for heterogeneous SoC
B Forsberg, A Marongiu, L Benini
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
HERO: Heterogeneous embedded research platform for exploring RISC-V manycore accelerators on FPGA
A Kurth, P Vogel, A Capotondi, A Marongiu, L Benini
arXiv preprint arXiv:1712.06497, 2017
P-SOCRATES: A parallel software framework for time-critical many-core systems
LM Pinho, V Nélis, PM Yomsi, E Quiñones, M Bertogna, P Burgio, ...
Microprocessors and Microsystems 39 (8), 1190-1203, 2015
Supporting OpenMP on a multi-cluster embedded MPSoC
A Marongiu, P Burgio, L Benini
Microprocessors and Microsystems 35 (8), 668-682, 2011
Energy-quality scalable integrated circuits and systems: Continuing energy scaling in the twilight of Moore’s law
M Alioto, V De, A Marongiu
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4 …, 2018
Dissecting the CUDA scheduling hierarchy: a performance and predictability perspective
IS Olmedo, N Capodieci, JL Martinez, A Marongiu, M Bertogna
2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS …, 2020
A memory-centric approach to enable timing-predictability within embedded many-core accelerators
P Burgio, A Marongiu, P Valente, M Bertogna
2015 CSI Symposium on Real-Time and Embedded Systems and Technologies (RTEST …, 2015
Flexfloat: A software library for transprecision computing
G Tagliavini, A Marongiu, L Benini
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy
A Marongiu, L Benini
2009 Design, Automation & Test in Europe Conference & Exhibition, 809-814, 2009
A transprecision floating-point architecture for energy-efficient embedded computing
S Mach, D Rossi, G Tagliavini, A Marongiu, L Benini
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
A software stack for next-generation automotive systems on many-core heterogeneous platforms
P Burgio, M Bertogna, N Capodieci, R Cavicchioli, M Sojka, P Houdek, ...
Microprocessors and Microsystems 52, 299-311, 2017
Variation-tolerant openmp tasking on tightly-coupled processor clusters
A Rahimi, A Marongiu, P Burgio, RK Gupta, L Benini
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 541-546, 2013
The challenge of time-predictability in modern many-core architectures
V Nélis, PM Yomsi, LM Pinho, J Fonseca, M Bertogna, E Quiñones, ...
14th International Workshop on Worst-Case Execution Time Analysis, 2014
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Artikler 1–20