| Repeater scaling and its impact on CAD P Saxena, N Menezes, P Cocchini, DA Kirkpatrick IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004 | 396 | 2004 |
| Miller factor for gate-level coupling delay calculation P Chen, DA Kirkpatrick, K Keutzer IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000 | 128 | 2000 |
| Techniques for crosstalk avoidance in the physical design of high-performance digital systems DA Kirkpatrick, AL Sangiovanni-Vincentelli ICCAD 94, 616-620, 1994 | 124 | 1994 |
| ALIGN: Open-source analog layout automation from the ground up K Kunal, M Madhusudan, AK Sharma, W Xu, SM Burns, R Harjani, J Hu, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019 | 84 | 2019 |
| Switching window computation for static timing analysis in presence of crosstalk noise P Chen, DA Kirkpatrick, K Keutzer IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000 | 76 | 2000 |
| The scaling challenge: can correct-by-construction design help? P Saxena, N Menezes, P Cocchini, DA Kirkpatrick Proceedings of the 2003 international symposium on Physical design, 51-58, 2003 | 68 | 2003 |
| EDA challenges facing future microprocessor design T Karn, S Rawat, D Kirkpatrick, R Roy, GS Spirakis, N Sherwani, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000 | 63 | 2000 |
| Digital sensitivity: Predicting signal interaction using functional analysis DA Kirkpatrick, AL Sangiovanni-Vincentelli Proceedings of International Conference on Computer Aided Design, 536-541, 1996 | 62 | 1996 |
| ALIGN: A system for automating analog layout T Dhar, K Kunal, Y Li, M Madhusudan, J Poojary, AK Sharma, W Xu, ... IEEE Design & Test 38 (2), 8-18, 2020 | 46 | 2020 |
| Verification using uninterpreted functions and finite instantiations R Hojati, A Isles, D Kirkpatrick, RK Brayton International Conference on Formal Methods in Computer-Aided Design, 218-232, 1996 | 43 | 1996 |
| Dense, performance directed, auto place and route M Rose, M Wiesel, D Kirkpatrick, N Nettleton Proceedings of the IEEE 1988 Custom Integrated Circuits Conference, 11.1/1 …, 1988 | 24 | 1988 |
| Optimizing thread-to-core mapping on manycore platforms with distributed tag directories G Liu, T Schmidt, R Dömer, A Dingankar, D Kirkpatrick The 20th Asia and South Pacific Design Automation Conference, 429-434, 2015 | 20 | 2015 |
| A variant of parallel plane sweep algorithm for multicore systems AB Khlopotine, V Jandhyala, D Kirkpatrick IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 18 | 2013 |
| Scripting for EDA tools: a case study P Chen, DA Kirkpatrick, K Keutzer Proceedings of the IEEE 2001. 2nd International Symposium on Quality …, 2001 | 16 | 2001 |
| The implications of deep sub-micron technology on the design of high performance digital VLSI systems DA Kirkpatrick University of California, Berkeley, 1997 | 16 | 1997 |
| Simulation event pattern checking with proto BE Nelson, RB Jones, DA Kirkpatrick SHDL 1994, 1994 | 14 | 1994 |
| Apparatus and method for adaptable and efficient lane-wise tensor processing J Pearce, D Sheffield, S Srinivasan, J Cook, D Marr, A Davare, A Mishra, ... US Patent 10,776,110, 2020 | 12 | 2020 |
| Reinventing EDA with manycore processors S Sapatnekar, E Haritan, K Keutzer, A Devgan, DA Kirkpatrick, S Meier, ... Proceedings of the 45th annual Design Automation Conference, 126-127, 2008 | 11 | 2008 |
| A highly configurable hardware/Software stack for DNN inference acceleration S Banerjee, S Burns, P Cocchini, A Davare, S Jain, D Kirkpatrick, ... arXiv preprint arXiv:2111.15024, 2021 | 8 | 2021 |
| Static crosstalk noise analysis for deep sub-micron digital designs P Chen University of California, Berkeley, 2003 | 7 | 2003 |
