Improving combinational circuit reliability against multiple event transients via a partition and restructuring approach MR Rohanipoor, B Ghavami, M Raji IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 21 | 2019 |
Soft error tolerant design of combinational circuits based on a local logic substitution scheme MR Rohanipoor, B Ghavami, M Raji Microelectronics journal 67, 143-154, 2017 | 5 | 2017 |
Design of fault tolerant digital integrated circuits based on quadded transistor logic MR Rohanipoor, B Ghavami, M Raji 2016 Eighth International Conference on Information and Knowledge Technology …, 2016 | 2 | 2016 |
Increasing Digital Circuits Tolerance Against Soft Errors Caused by Multiple Event Transient Faults Using Logical Resynthesize Mohammad Reza Rohanipoor, Behnam Ghvami, Mohsen Raji The 25th Iranian conference on Electrical Engineering (ICEE 2017), At K.N …, 2017 | | 2017 |
soft error rate reduction of combinational circuits using parallel gates in the presence of process variation Mohammad Reza Rohanipoor, Behnam Ghavami, Mohsen Raji The 24th Iranian Conference on Electrical Engineering (ICEE 2016), At Shiraz …, 2016 | | 2016 |
A Partitioning and Logic Restructuring based Approach for Increasing Reliability of Combinational Circuits against Multiple Event Transients (METs) MR Rohanipoor, B Ghavami, M Raji | | |