Approximate computing with partially unreliable dynamic random access memory-approximate DRAM M Jung, DM Mathew, C Weis, N Wehn Proceedings of the 53rd Annual Design Automation Conference, 1-4, 2016 | 55 | 2016 |
Omitting refresh: A case study for commodity and wide i/o drams M Jung, É Zulian, DM Mathew, M Herrmann, C Brugger, C Weis, N Wehn Proceedings of the 2015 International Symposium on Memory Systems, 85-91, 2015 | 52 | 2015 |
A platform to analyze DDR3 DRAM’s power and retention time M Jung, DM Mathew, CC Rheinländer, C Weis, N Wehn IEEE Design & Test 34 (4), 52-59, 2017 | 33 | 2017 |
Efficient reliability management in SoCs-an approximate DRAM perspective M Jung, DM Mathew, C Weis, N Wehn 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 390-394, 2016 | 32 | 2016 |
ConGen: An application specific DRAM memory controller generator M Jung, DM Mathew, C Weis, N Wehn, I Heinrich, MV Natale, SO Krumke Proceedings of the Second International Symposium on Memory Systems, 257-267, 2016 | 28 | 2016 |
An analysis on retention error behavior and power consumption of recent DDR4 DRAMs DM Mathew, M Schultheis, CC Rheinländer, C Sudarshan, C Weis, ... 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 293-296, 2018 | 22 | 2018 |
A lean, low power, low latency DRAM memory controller for transprecision computing C Sudarshan, J Lappas, C Weis, DM Mathew, M Jung, N Wehn Embedded Computer Systems: Architectures, Modeling, and Simulation: 19th …, 2019 | 20 | 2019 |
Improving the error behavior of DRAM by exploiting its Z-channel property K Kraft, C Sudarshan, DM Mathew, C Weis, N Wehn, M Jung 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 19 | 2018 |
A new bank sensitive DRAMPower model for efficient design space exploration M Jung, DM Mathew, ÉF Zulian, C Weis, N Wehn 2016 26th International Workshop on Power and Timing Modeling, Optimization …, 2016 | 18 | 2016 |
A Bank-Wise DRAM power model for system simulations DM Mathew, ÉF Zulian, S Kannoth, M Jung, C Weis, N Wehn Proceedings of the 9th Workshop on Rapid Simulation and Performance …, 2017 | 14 | 2017 |
Using run-time reverse-engineering to optimize DRAM refresh DM Mathew, ÉF Zulian, M Jung, K Kraft, C Weis, B Jacob, N Wehn Proceedings of the International Symposium on Memory Systems, 115-124, 2017 | 11 | 2017 |
Thermoelectric cooling to survive commodity DRAMs in harsh environment automotive electronics DM Mathew, H Kattan, C Weis, J Henkel, N Wehn, H Amrouch IEEE Access 9, 83950, 2021 | 10 | 2021 |
RRAMSpec: A design space exploration framework for high density resistive RAM DM Mathew, AL Chinazzo, C Weis, M Jung, B Giraud, P Vivet, A Levisse, ... Embedded Computer Systems: Architectures, Modeling, and Simulation: 19th …, 2019 | 7 | 2019 |
Efficient coding scheme for DDR4 memory subsystems K Kraft, DM Mathew, C Sudarshan, M Jung, C Weis, N Wehn, F Longnos Proceedings of the International Symposium on Memory Systems, 148-157, 2018 | 5 | 2018 |
The role of memories in transprecision computing C Weis, M Jung, ÉF Zulian, C Sudarshan, DM Mathew, N Wehn 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 5 | 2018 |
Using runtime reverse engineering to optimize DRAM refresh DM Mathew, M Jung, C Weis, N Wehn US Patent 10,622,054, 2020 | 2 | 2020 |
Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling DM Mathew, H Kattan, C Weis, J Henkel, N Wehn, H Amrouch IEEE Access 9, 83950-83962, 2021 | 1 | 2021 |
Omitting refresh M Jung, É Zulian, DM Mathew, M Herrmann, C Brugger, C Weis, N Wehn Proceedings of the 2015 International Symposium on Memory Systems, 2015 | 1 | 2015 |
Advanced Heterogeneous Memory Subsystems for Energy-constrained Computing: Fortgeschrittene Heterogene Speichersubsysteme Für Computersysteme Mit Limitiertem Energieverbrauch DM Mathew Universität Kaiserslautern, 2021 | | 2021 |
A Platform for Analyzing DDR3 and DDR4 DRAMs M Jung, DM Mathew, C Weis, N Wehn | | 2018 |