Philippe Navaux
Philippe Navaux
Professor Informatics Institute, UFRGS
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Cited by
Cited by
Understanding GPU errors on large-scale HPC systems and the implications for system design and operation
D Tiwari, S Gupta, J Rogers, D Maxwell, P Rech, S Vazhkudai, D Oliveira, ...
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
High performance computing in the cloud: Deployment, performance and cost efficiency
E Roloff, M Diener, A Carissimi, POA Navaux
4th IEEE International Conference on Cloud Computing Technology and Science …, 2012
Impact of GPUs parallelism management on safety-critical and HPC applications reliability
P Rech, LL Pilla, POA Navaux, L Carro
2014 44th Annual IEEE/IFIP International Conference on Dependable Systems …, 2014
Characterizing communication and page usage of parallel applications for thread and data mapping
M Diener, EHM Cruz, LL Pilla, F Dupros, POA Navaux
Performance Evaluation 88, 18-36, 2015
Multi-core aware process mapping and its impact on communication overhead of parallel applications
ER Rodrigues, FL Madruga, POA Navaux, J Panetta
2009 IEEE Symposium on Computers and Communications, 811-817, 2009
Evaluation and mitigation of soft-errors in neural network-based object detection in three GPU architectures
FF dos Santos, L Draghetti, L Weigel, L Carro, P Navaux, P Rech
2017 47th Annual IEEE/IFIP International Conference on Dependable Systems …, 2017
Sinuca: A validated micro-architecture simulator
MAZ Alves, C Villavieja, M Diener, FB Moreira, POA Navaux
2015 IEEE 17th International Conference on High Performance Computing and …, 2015
A hierarchical approach for load balancing on parallel multi-core systems
LL Pilla, CP Ribeiro, D Cordeiro, C Mei, A Bhatele, POA Navaux, ...
2012 41st International Conference on Parallel Processing, 118-127, 2012
Using memory access traces to map threads and data on hierarchical multi-core platforms
EHM da Cruz, MAZ Alves, A Carissimi, POA Navaux, CP Ribeiro, ...
2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011
Performance/energy trade‐off in scientific computing: the case of ARM big. LITTLE and Intel Sandy Bridge
EL Padoin, LL Pilla, M Castro, FZ Boito, PO Alexandre Navaux, JF Méhaut
IET Computers & Digital Techniques 9 (1), 27-35, 2015
Experimental and analytical study of xeon phi reliability
D Oliveira, L Pilla, N DeBardeleben, S Blanchard, H Quinn, I Koren, ...
Proceedings of the International Conference for High Performance Computing …, 2017
A comparative analysis of load balancing algorithms applied to a weather forecast model
ER Rodrigues, POA Navaux, J Panetta, A Fazenda, CL Mendes, LV Kale
2010 22nd International Symposium on Computer Architecture and High …, 2010
kMAF: Automatic kernel-level management of thread and data affinity
M Diener, EHM Cruz, POA Navaux, A Busse, HU Heiß
Proceedings of the 23rd international conference on Parallel architectures …, 2014
On the energy efficiency and performance of irregular application executions on multicore, NUMA and manycore platforms
E Francesquini, M Castro, PH Penna, F Dupros, HC Freitas, POA Navaux, ...
Journal of Parallel and Distributed Computing 76, 32-48, 2015
Evaluating high performance computing on the windows azure platform
E Roloff, F Birck, M Diener, A Carissimi, POA Navaux
2012 IEEE Fifth International Conference on Cloud Computing, 803-810, 2012
Affinity-based thread and data mapping in shared memory systems
M Diener, EHM Cruz, MAZ Alves, POA Navaux, I Koren
ACM Computing Surveys (CSUR) 49 (4), 1-38, 2016
Previsão de séries de tempo: redes neurais artificiais e modelos estruturais
LGL Fernandes, POA Navaux, MS Portugal
Pesquisa e planejamento econômico. Rio de Janeiro, RJ. Vol. 26, n. 2 (ago …, 1996
Evaluating thread placement based on memory access patterns for multi-core processors
M Diener, F Madruga, E Rodrigues, M Alves, J Schneider, P Navaux, ...
2010 IEEE 12th International Conference on High Performance Computing and …, 2010
The MultiCluster model to the integrated use of multiple workstation clusters
M Barreto, R Avila, P Navaux
Parallel and Distributed Processing: 15 IPDPS 2000 Workshops Cancun, Mexico …, 2000
Supporting malleability in parallel architectures with dynamic CPUSETs mapping and dynamic MPI
MC Cera, Y Georgiou, O Richard, N Maillard, POA Navaux
Distributed Computing and Networking: 11th International Conference, ICDCN …, 2010
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