| Analog circuit design in nanoscale CMOS technologies LL Lewyn, T Ytterdal, C Wulff, K Martin Proceedings of the IEEE 97 (10), 1687-1714, 2009 | 270 | 2009 |
| A compiled 9-bit 20-MS/s 3.5-fJ/conv. step SAR ADC in 28-nm FDSOI for Bluetooth low energy receivers C Wulff, T Ytterdal IEEE Journal of Solid-State Circuits 52 (7), 1915-1926, 2017 | 39 | 2017 |
| An 11.0 bit ENOB, 9.8 fJ/conv.-step noise-shaping SAR ADC calibrated by least squares estimation H Garvik, C Wulff, T Ytterdal 2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017 | 32 | 2017 |
| Bootstrapped switch in low-voltage digital 90nm CMOS technology C Lillebrekke, C Wulff, T Ytterdal 2005 NORCHIP, 234-236, 2005 | 27 | 2005 |
| High speed, high gain OTA in a digital 90nm CMOS technology O Berntsen, C Wulff, T Ytterdal 2005 NORCHIP, 129-132, 2005 | 25 | 2005 |
| Next Generation Lab-a solution for remote characterization of analog integrated circuits C Wulff, T Ytterdal, TA Saethre, A Skjelvan, TA Fjeldly, MS Shur Proceedings of the Fourth IEEE International Caracas Conference on Devices …, 2002 | 22 | 2002 |
| Comparator-based switched-capacitor pipelined analog-to-digital converter with comparator preset, and comparator delay compensation C Wulff, T Ytterdal Analog Integrated Circuits and Signal Processing 67, 31-40, 2011 | 20 | 2011 |
| 0.8 V 1GHz dynamic comparator in digital 90nm CMOS technology C Wulff, C Ytterdal 2005 NORCHIP, 237-240, 2005 | 20 | 2005 |
| Resonators in open-loop sigma–delta modulators C Wulff, T Ytterdal IEEE Transactions on Circuits and Systems I: Regular Papers 56 (10), 2159-2172, 2009 | 12 | 2009 |
| A compiled 3.5 fJ/conv. step 9b 20MS/s SAR ADC for wireless applications in 28nm FDSOI C Wulff, T Ytterdal ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 177-180, 2016 | 9 | 2016 |
| A 68 dB SNDR compiled noise-shaping SAR ADC with on-chip CDAC calibration H Garvik, C Wulff, T Ytterdal 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 193-194, 2019 | 8 | 2019 |
| CBSC pipelined ADC with comparator preset, and comparator delay compensation C Wulff, T Ytterdal 2009 NORCHIP, 1-4, 2009 | 8 | 2009 |
| On the energy efficiency of analog circuits in nanoscale CMOS technologies T Ytterdal, C Wulff 2008 International Conference on Microelectronics, 240-243, 2008 | 7 | 2008 |
| Switched capacitor analog modulo integrator for application in open loop sigma-delta modulators C Wulff, Ø Knauserud, T Ytterdal Analog Integrated Circuits and Signal Processing 54, 121-131, 2008 | 7 | 2008 |
| Efficient ADCs for nano-scaleCMOS Technology C Wulff Norges teknisk-naturvitenskapelige universitet, Fakultet for …, 2008 | 7 | 2008 |
| Programmable analog integrated circuit for use in remotely operated laboratories C Wulff, T Ytterdal International Conference on Engineering Education, 2002 | 6 | 2002 |
| High-level comparison of control-bounded A/D converters and continuous-time sigma-delta modulators F Feyling, H Malmberg, C Wulff, HA Loeliger, T Ytterdal 2022 IEEE Nordic Circuits and Systems Conference (NorCAS), 1-5, 2022 | 5 | 2022 |
| Reference voltages C Wulff, CFI Velezmoro US Patent App. 15/572,952, 2018 | 5 | 2018 |
| Design of A 7-bit, 200MS/s, 2mW pipelined ADC with switched open-loop amplifiers in a 65nm CMOS technology C Wulff, T Ytterdal Norchip 2007, 1-4, 2007 | 5 | 2007 |
| Design and Analysis of the Leapfrog Control-Bounded A/D Converter F Feyling, H Malmberg, C Wulff, HA Loeliger, T Ytterdal IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023 | 4 | 2023 |
