Daniel Ziener

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Medforfattere

Jürgen TeichFull Professor, Computer Science, Friedrich-Alexander-Universität Erlangen-NürnbergVerifisert e-postadresse på cs.fau.de
Dirk KochSchool of Computer Science, University of ManchesterVerifisert e-postadresse på recobus.de
Stefan WildermannFriedrich-Alexander-Universität Erlangen-Nürnberg (FAU)Verifisert e-postadresse på fau.de
Frank HannigFriedrich-Alexander-Universität Erlangen-Nürnberg (FAU)Verifisert e-postadresse på cs.fau.de
Norbert WehnUniversity of KaiserslauternVerifisert e-postadresse på eit.uni-kl.de
Andreas HerkersdorfProfessor for Electrical and Computer EngineeringVerifisert e-postadresse på tum.de
Felix ReimannAudi Electronics Venture GmbHVerifisert e-postadresse på fex-it.de
Klaus Meyer-WegenerProfessor of Computer Science, Friedrich-Alexander-Universität Erlangen-NürnbergVerifisert e-postadresse på fau.de
Robért GleinFPGA Expert at CU Boulder with CMS experiment in CERNVerifisert e-postadresse på colorado.edu
Florian RittnerVerifisert e-postadresse på fau.de
Jorge EchavarriaResearch Assistant of Computer Science, Friedrich Alexander UniversitätVerifisert e-postadresse på fau.de
Jim TorresenProfessor University of OsloVerifisert e-postadresse på ifi.uio.no
Michael GlaßProfessor at Ulm UniversityVerifisert e-postadresse på uni-ulm.de
Rolf ErnstProfessor at Institute of Computer and Network Engineering, TU Braunschweig, GermanyVerifisert e-postadresse på tu-bs.de
Oliver BringmannProfessor of Embedded Systems, Eberhard Karls Universität Tübingen, GermanyVerifisert e-postadresse på uni-tuebingen.de
Andreas WeichslgartnerAudi AGVerifisert e-postadresse på audi.de
Kimon KarrasAnalog DevicesVerifisert e-postadresse på f-in.co.uk
Michaela BlottXilinx ResearchVerifisert e-postadresse på xilinx.com
Ling LiuGeorgia Institute of TechnologyVerifisert e-postadresse på cc.gatech.edu
Peter AthanasProfessor of Electrical and Computer EngineeringVerifisert e-postadresse på vt.edu

Daniel Ziener

Professor for Computer Architecture and Embedded Systems, Technische Universität Ilmenau

Verifisert e-postadresse på tu-ilmenau.de - Startside

Reconfigurable Computing FPGA Embedded Systems Reliability Security


Tittel Sortér etter sitater Sortér etter år Sortér etter tittel	Sitert av Sitert av	År
On-the-fly composition of FPGA-based SQL query accelerators using a partially reconfigurable module library C Dennl, D Ziener, J Teich 2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012	86	2012
Power signature watermarking of IP cores for FPGAs D Ziener, J Teich Journal of Signal Processing Systems 51 (1), 123-136, 2008	74	2008
FPGAs for software programmers D Koch, F Hannig, D Ziener Springer, 2016	60	2016
Acceleration of SQL restrictions and aggregations through FPGA-based dynamic partial reconfiguration C Dennl, D Ziener, J Teich 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013	54	2013
Identifying FPGA IP-cores based on lookup table content analysis D Ziener, S Aßmus, J Teich 2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006	52	2006
Netlist-level IP protection by watermarking for LUT-based FPGAs M Schmid, D Ziener, J Teich 2008 International Conference on Field-Programmable Technology, 209-216, 2008	50	2008
Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration A Becher, F Bauer, D Ziener, J Teich 2014 24th International Conference on Field Programmable Logic and …, 2014	48	2014
A self-adaptive SEU mitigation system for FPGAs with an internal block RAM radiation particle sensor R Glein, B Schmidt, F Rittner, J Teich, D Ziener 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014	41	2014
FPGA-based dynamically reconfigurable SQL query processing D Ziener, F Bauer, A Becher, C Dennl, K Meyer-Wegener, U Schürfeld, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 9 (4), 1-24, 2016	33	2016
Partial reconfiguration on FPGAs in practice—Tools and applications D Koch, J Torresen, C Beckhoff, D Ziener, C Dennl, V Breuer, J Teich, ... ARCS 2012, 1-12, 2012	33	2012
A co-design approach for accelerated SQL query processing via FPGA-based data filtering A Becher, D Ziener, K Meyer-Wegener, J Teich 2015 International Conference on Field Programmable Technology (FPT), 192-195, 2015	30	2015
Using the power side channel of FPGAs for communication D Ziener, F Baueregger, J Teich 2010 18th IEEE Annual International Symposium on Field-Programmable Custom …, 2010	30	2010
FPGA core watermarking based on power signature analysis D Ziener, J Teich 2006 IEEE International Conference on Field Programmable Technology, 205-212, 2006	26	2006
Symbolic design space exploration for multi-mode reconfigurable systems S Wildermann, F Reimann, D Ziener, J Teich Proceedings of the seventh IEEE/ACM/IFIP international conference on …, 2011	24	2011
Stress-aware module placement on reconfigurable devices J Angermeier, D Ziener, M Glaß, J Teich 2011 21st International Conference on Field Programmable Logic and …, 2011	21	2011
Reliability of space-grade vs. COTS SRAM-based FPGA in N-modular redundancy R Glein, F Rittner, A Becher, D Ziener, J Frickel, J Teich, A Heuberger 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 1-8, 2015	18	2015
Evaluation of Watermarking methods for FPGA-based IP-cores D Ziener, J Teich University of Erlangen-Nuremberg, Department of CS 12, 2005	17	2005
Multiplexing methods for power watermarking D Ziener, F Baueregger, J Teich 2010 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2010	16	2010
A rapid prototyping system for error-resilient multi-processor systems-on-chip M May, N Wehn, A Bouajila, J Zeppenfeld, W Stechele, A Herkersdorf, ... 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010	16	2010
Concepts for autonomous control flow checking for embedded cpus D Ziener, J Teich International Conference on Autonomic and Trusted Computing, 234-248, 2008	14	2008

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